1. Field of the Invention
The present invention relates to processes to form a film of substantially uniform properties on the active surface of a semiconductor substrate, such as a semiconductor wafer or other structure, of silicon, polysilicon, gallium arsenide, silicon on insulator (SOI), silicon on sapphire (SOS), silicon on class (SOG) or any other material which is useful as a semiconductor substrate in integrated circuit applications. Particularly, the process of the present invention includes forming films upon a semiconductor substrate at non-steady state temperatures in order to facilitate the substantially uniform properties of such films. The present invention also relates to processes for forming, thin films having substantially uniform properties across the surface of a semiconductor wafer or other substrate during the formation of a layer of a material thereupon by creating, temperature gradients between the center and edge of the semiconductor wafer.
2. Background of Related Art
As the integrated circuitry that is carried upon semiconductor substrates becomes ever-smaller and the surface area of such devices becomes ever-larger, the thermal output of such devices increases. Inconsistencies in the properties of the electrically conductive, semiconductive, and non-conductive layers of a semiconductor wafer, including without limitation thickness, sheet resistance, reflectivity, transmissivity, absorptivity, dielectric constant, and various other characteristics of such layers, affect the electrical performance of semiconductor substrates, and therefore contribute, in part, to increased heat output, consequently higher operating temperatures, and other inefficiencies of many state-of-the-art semiconductor substrates.
The formation of films of substantially uniform properties on semiconductor wafer or other substrate active surfaces requires control over the rate at which chemical reactions occur over the active surface. Since elevated temperatures drive these layer-forming reactions, the ability to control the uniform distribution of reactants over a semiconductor wafer""s active surface is affected by the temperature of the region of the semiconductor wafer that lies therebeneath and the concentration of the reactants thereabove. If the temperature is uniform (i.e., a temperature gradient does not exist) across the active surface of a semiconductor wafer, reaction rate gradients may develop thereover, which phenomenon leads to variations in the properties of the layers formed on the active surface. Thus, during the fabrication or formation of layers on semiconductor wafers, a lack of temperature gradients thereacross is undesirable.
Various techniques are known in the art for forming layers on the active surface of semiconductor wafers or other substrates. One such technique, known as single wafer optical processing, combines low thermal mass photon-assisted rapid wafer heating with reactive ambient semiconductor processing. Optical processing permits the rapid alteration of both the temperature of the semiconductor substrate and the process environment. Consequently, each of the fabrication steps and their sub-processes may be independently optimized in order to improve the overall electrical performance of the resulting semiconductor substrates.
Another technique that is conventionally employed to form layers on the active surface of semiconductor substrates is known as rapid thermal processing (RTP). Rapid thermal processing techniques typically employ radiant energy to heat the semiconductor substrate to very high temperatures (e.g., 420xc2x0 C. to 1150xc2x0 C.) for short time periods. The widespread use of rapid thermal processing may, in part, be due to the repeatable quality of the films formed thereby. Rapid thermal processing may be employed to form oxide layers, nitride layers, doped layers, and to perform different types of thermal anneals of layers on semiconductor substrates.
Similarly, several types of chemical vapor deposition chambers and techniques are conventionally employed to form dielectric layers (e.g., oxides, nitrides, and advanced dielectrics), semiconductor layers (e.g., amorphous silicon and polysilicon), and electrically conductive layers (e.g., aluminum, copper, tungsten, and titanium nitride), on semiconductor substrate active surfaces.
Many such techniques, however, are unable to generate or maintain substantially uniform amounts of layer-forming reactions across the surface of semiconductor wafers and, therefore, do not form thin films of uniform properties upon the active surface of semiconductor wafers. Such conventional layer formation techniques typically utilize steady-state conditions (i.e., the reaction temperature is maintained within a typically small predetermined range), which often permit the formation of significant reaction rate gradients across the active surface of the semiconductor wafer, thereby limiting the uniformity of films formed thereon. Thus, by maintaining a stable temperature during layer formation, many of these conventional systems actually impede a uniform reaction across the surface of the semiconductor wafers. Consequently, layers of non-uniform properties form on the semiconductor wafers. Further, with many of the current layer formation techniques, as the size of semiconductor wafers increases, and larger non-wafer semiconductor substrates become more commonly used, variations in layer properties become more pronounced due to the greater depletion of reactants over some regions thereof than other regions thereof.
U.S. Pat. No. 5,635,409 (the xe2x80x9c409 patentxe2x80x9d), issued to Mehrdad M. Moslehi on Jun. 3, 1997, discloses a control system and process which attempt to reduce or eliminate the development of temperature gradients (i.e., optimize process uniformity) over semiconductor wafer active surfaces during each of the heat-up, steady-state heating and cool-down phases by monitoring and adjusting the reaction chamber temperature at various locations. According to the process of the ""409 patent, the semiconductor substrate and reaction chamber temperatures are adjusted in a linear fashion during the heat-up and cool-down phases.
However, use of the control system of the ""409 patent is somewhat undesirable since it creates and maintains a substantially uniform or xe2x80x9csteady statexe2x80x9d temperature over the semiconductor wafer, which, as explained above, does not facilitate, and actually impedes, reaction rate uniformity. Moreover, due to the ever-increasing size of semiconductor wafers and other substrates, the maintenance of a constant temperature over the surface of such semiconductor wafers may further decrease the uniformity of properties of thin films formed thereon.
The generation and maintenance of a uniform temperature across a semiconductor wafer may, however, be desirable while forming layers of some materials on the semiconductor wafer. For example, uniform semiconductor wafer temperatures are desirable during dopant diffusion processes, metal salicidation processes, and where multiple layers having different coefficients of expansion are being formed upon the semiconductor wafer and annealed to one another. Conventional layer formation processes which generate and maintain uniform semiconductor wafer temperatures, however, may also induce stress on the semiconductor wafer, which may in turn cause lattice defects in the semiconductor wafer, such as point, line, or area slip defects.
Thus, a need exists for a process for forming films of substantially uniform properties on the active surface of semiconductor substrates, while reducing stress on the semiconductor substrates.
The present invention addresses each of the foregoing needs by forming material layers upon a semiconductor substrate under non-steady state temperature conditions. Stated another way, the inventive process forms layers during non-steady state phases, such as ramp-up and ramp-down of the reaction chamber temperature, rather than during a phase where the temperature of a reaction chamber or furnace is held steady.
In a first embodiment of the process of the present invention, a layer is formed upon a semiconductor substrate during a ramp-up of the reactor temperature. Deposition under such conditions of increasing temperature facilitates the formation of a layer of substantially uniform properties over the semiconductor substrate. The first embodiment of the process of the present invention is particularly useful for forming layers of materials upon semiconductor substrates, which materials, where used to form layers by conventional steady-state techniques, typically result in a material layer thinner at the edge region of a semiconductor substrate than at the center region thereof.
A second embodiment of the process of the present invention includes the formation of a material layer during a controlled ramp-down of the reactor temperature, during which the temperature at the edge region of the semiconductor substrate is cooler than that at the center region thereof. The second embodiment facilitates the formation of uniform property layers of materials which, where employed with conventional steady-state layer forming techniques, typically result in layers thicker at the edge regions of a semiconductor substrate than at the center region thereof.
In both the first and second embodiments of the inventive process, a layer may be formed in multiple steps, where more than one ramp-up or ramp-down is employed in order to form the layer.
In another embodiment of the inventive process, the reaction chamber temperature is intermittently varied, continually fluctuated or oscillated in order to provide a substantially uniform reaction over the semiconductor substrate while forming a layer thereon. Such fluctuation in the temperature of the reaction chamber may be effected during the ramp-up, the ramp-down, and/or the so-called xe2x80x9csteady statexe2x80x9d temperature trends. During such fluctuation of the temperature of the reaction chamber, the temperature profile, plotted temperature (y-axis coordinate) over time (x-axis coordinate), may have a saw-tooth (i.e., linear, with small variations) or a humped configuration. Such variation of the reaction temperature equalizes the reaction rate across the surface of the semiconductor substrate, and may be effected by existing fabrication equipment.
Semiconductor substrates which include material layers formed in accordance with the processes of the present invention are also within the scope of the present invention.
Other advantages of the present invention will become apparent to those of ordinary skill in the relevant art through a consideration of the appended drawings and the ensuing description.